1. Field of the Invention
The present invention relates to the field of power electronics. It concerns a GTO thyristor circuit comprising:
(a) a gate turn-off thyristor GTO having an anode, a cathode and a gate; PA1 (b) a drive circuit which is connected between gate and cathode of the GTO and which, together with the GTO, forms a gate circuit and is provided for turning the GTO on and off; and PA1 (c) a first inductance and a second inductance inside the gate circuit, the first inductance representing the inductance of the conductors and components in the drive circuit and the second inductance the internal inductance of the GTO itself. PA1 complexity in the driving system; PA1 turn-off failures; PA1 spike voltage control; PA1 switching losses in the GTO and in the circuit; PA1 cooling. PA1 a relatively low gate circuit inductance LG between a switch GU and the gate terminal of the GTO component; PA1 a first high-voltage capacitor CR1 between the switch GU and the cathode terminal of the GTO; PA1 a second, lower-voltage capacitor CE1 in parallel with the first capacitor CR1 and a diode D1 upstream of CE1 for isolating the capacitor voltages. PA1 (d) a first capacitor which is connected to the gate and cathode of the GTO via a switch situated in series is provided in the gate circuit and forms, together with the first and second inductance, a series oscillatory circuit; PA1 (e) the chosen sizes of the first capacitor and of the first inductance are such that, if the first capacitor discharges via the two inductances, the gate current originating from the first capacitor exceeds half the value of a GTO anode current to be turned off within less than 5 .mu.s in the first quarter oscillation of the series oscillatory circuit; PA1 (f) first means are provided which uncouple the first capacitor from the generation of the gate current after the first quarter oscillation of the series oscillatory circuit and allows the gate current to decay slowly in such a way that, at any time, it is greater than the tail current of the GTO; and PA1 (g) second means are provided which are activated during the decay of the gate current and apply a holding voltage which is sufficient for blocking to the gate of the GTO after the decay of the gate current.
Such a is circuit disclosed, for example, in EP-A3-0 228 226.
2. Discussion of Background
At present a multiplicity comprising about 190 types of GTO is available on the market. In application, they essentially divide into three important fields of use, namely traction (for example, in electric locomotives), the UPS (uninterruptible mower system) and industrial drives. This widespread use has taken place even though the GTO is subject to a few problems for the user, particularly from the point of view of circuit engineering. An improvement in the GTO itself or a simplification of its external circuit therefore has an enormous economic significance.
In connection with the GTO, the user sees himself confronted, in particular, with the following problem areas:
Turn-off thyristors (GTOs) had, hitherto to be operated with appreciable circuit networks comprising diodes, inductances and capacitors (snubbers) in order to reliably avoid critical states in the component. Apart from additional weight, increased volume and appreciable losses, this entails, in particular, additional development and manufacturing costs. The development of control software is markedly more expensive as a result of the complicated mode of operation engendered by the snubbers. Attempts are therefore being made to reduce the size of the snubbers (smaller inductances and smaller capacitors) and to simplify them.
In this connection, an important role is played, in particular, by the leakage inductance of the arrangement and the snubber diode. To reduce surge voltages due to inductances, an appreciable design complexity has to be adopted. More recently, very special diodes have also been developed for these applications.
The reason for the snubbers required is generally recognized to consist in the inhomogeneous turning-on and turning-off of GTOs: a multiplicity of studies using infrared, thermal and induction measurements have repeatedly emphasized this state of affairs. The efforts have, therefore been directed to the production of components which are as homogeneous as possible (in particular, in relation to the doping). Despite striking improvements in the doping homogeneity, it has not been possible, however, to simplify the snubbers substantially or to reduce them in size.
The declared objective of users and manufacturers is a rapidly switchable HF-GTO. This should be notable, inter alia, for a markedly smaller circuit complexity, and for low driving power and few turn-off failures. To provide such an HF-GTO, the earlier European Application No. 90123659.6 by the same inventor of the present invention has already proposed a hard driving switching arrangement, in which the turn-off is effected by a pulse-type gate current which rapidly exceeds (in a few .mu.s) the anode current.
FIG. 3 in the earlier application diagrammatically shows a suitable gate circuit for a GTO of known design. In that case, the gate circuit comprised
At the same time, the gate circuit inductance is set by the inductance which is unavoidable in conventional housing designs. The circuit functions in a quasi-resonant operating mode: the small first high-voltage (preferably.gtoreq.100 V, for example 200 V) capacitor CR1 initially supplies a gate current which rapidly increases despite the gate circuit inductance present and which, after the discharging of the second capacitor (the maintenance capacitor) CE1 is maintained for a fairly long time (duration of the turn-off process). The capacitor CR1 is rated (allowing for the actual inductance in the GTO housing) so that, after discharge, it has built up a gate current which corresponds to the maximum turn-off anode current. The relatively long-persisting current from CE1 has to be provided at a voltage which is below the avalanche of the gate/cathode section (15 25 V).
In this way, a gate current is provided which is sufficiently high and fast for the cathode current to be less than zero under all circumstances. The fairly long-persisting low voltage is able to prevent the gate current collapsing during switching and the component entering a critical state.
Although a gate circuit suitable for hard driving has consequently already been provided in principle in the earlier application, the means by which the critical transition of this circuit from the depletion mode (extraction of the charge carriers from the gate/cathode section) to the static holding mode is not disclosed. In order to make the set objective clear, the boundary conditions for a hard-driven HF-GTO or HD (hard-driven)GTO will first be defined more precisely below:
For ideal turn-off, the gate current I.sub.G should rise rapidly in a first phase p1 (FIGS. 1A and 1B) until it exceeds the anode current I.sub.A in a second phase p2 and consequently reverses the cathode current (not shown in the Figure). Once the cathode current has changed its polarity, the plasma in the gate/cathode section is extracted in a third phase p3 and the associated pn junction (gate voltage V.sub.G) acquires the avalanche voltage V.sub.AV. The gate voltage V.sub.G maintains the avalanche voltage V.sub.AV as long as the gate current I.sub.G is greater than the anode current I.sub.A (tail current) and then has to be restored to a lower value, sufficient for blocking, in such a way that the internal gate voltage never falls below a critical limit (the minimum holding voltage V.sub.H,min) in a fourth phase p4. This has to be followed by a fifth phase p5, the holding phase, during which the gate voltage is held at an off potential (holding voltage V.sub.H).
In principle it would, therefore be sufficient if the gate voltage at the silicon wafer of the GTO (internal gate voltage) were already set to the second value, the holding voltage V.sub.H, which is sufficient for blocking after completion of the depletion process. The third phase p3 could then be eliminated and the energy consumption of the gate circuit would be reduced to a necessary minimum. For this purpose, however, a voltage control would be necessary instead of the current control, i.e. the direct control of the internal gate voltage by a suitably stable voltage source. In the case of a GTO in a standard housing, however, this is impossible because of the conductor inductance since, instead of the actual 30 nH 50 nH, a gate circuit inductance of not more than 1 nH would have to be achieved (dI/dt&gt;5 kA/.mu.s, equivalent to 5 V across 1 nH, has been measured).
In the case of the GTO drive, the conditions are consequently different: during the first phase p1, current control has to take place since, to achieve a dI/dt&gt;2 kA/.mu.s (3 kA GTO; turn-off condition reached after 1 .mu.s) a much greater voltage is necessary, as already mentioned, than the holding voltage V.sub.H in the fourth phase p4 (typically 15 V). As already disclosed in the earlier application mentioned, the energy for this purpose is most easily derived, in accordance with FIG. 2, from a capacitor discharge. For this purpose, a first capacitor C1 is connected to gate G and cathode K of the GTO via a switch S, the lead inductance L1 and the internal inductance L2 of the GTO.
However, before the current in the resultant oscillatory circuit (comprising the first capacitor C1, the conductor inductance L1 and the internal inductance L2) reverses after the first half-cycle, the first capacitor C1 has to be uncoupled. This could be done, for example, by means of a diode D1 (FIG. 3) which is connected in series with the first capacitor C1. C1 is then recharged and the current is interrupted after passing through the diode recovery stage (caution: current reversed for a short time). In this case, an additional source Q must already be brought into the circuit before the current drops below the tail current so that the internal gate voltage on the GTO does not collapse for a short time. A complicated timing control and a further low-inductance circuit would be necessary without the problem of the transition to the subsequent holding state being solved.
It would therefore be better to carry out the uncoupling at the very instant when the current maximum (the maximum gate current I.sub.G,max in FIG. 1A) (capacitor voltage 0) is being traversed. For this purpose, for example, the first diode D2 is connected in parallel with the first capacitor C1 in accordance with FIG. 4. Only the internal gate voltage and the losses in the switch S, in the first diode D2 and in the gate circuit then add to form the back-e.m.f. across the circuit inductance (L1+L2), i.e. the gate current I.sub.G generally decreases markedly more slowly than it rose (phase p3 in FIG. 1A). This ensures that the gate current I.sub.G during the drop-off phase (anode current I.sub.A drops back to the tail current value) is greater than the anode current I.sub.A,
Nevertheless, it would not be easy even then to define the correct instant for switching on a holding current source (current drops below the anode current I.sub.A). And, because dI/dt is still high, this source would also have to be current-controlled and the transition to the ultimate voltage control in the holding phase p4 would only be postponed.